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e - c m o s c o r p . ( ww w . e c m o s . c o m . t w ) p a g e 1 o f 13 4 l03 n - rev. f001 EC8806 ultra - low noise ultra - fast 300ma ldo regulator general description the e c 88 06 is a 300 ma , low dr o pout an d low noise linear regulator with high ripple rejection ratio and fast turn - on time. it ha s fixed and adjustable versions with output voltage ranging from 1. 5 v to 5 v. the ec88 06 includes a reference voltage source, an error amplifier, driver transistors and an internal current limiter. the current limiter s h oldback circuit operates as a short protect ion . the ec88 06 works well with low esr ceramic capacitors, suitable for portable rf and wireless bat tery - powered applications with stringent space requirements and demanding performance. it also offers ultra low noise output and has l ow quiescent current. features ? ultra - l ow - noise a pplication ? wide 2.5 v to 7 v operating range ? qu ick start - u p ? current limiting protection ? thermal shutdown protection ? low dropout : 2 00mv @ 300m a ? high ripple rejection 7 0 d b@1 k hz ? standby current less than 0.1 a ? seven fixed voltage options available application s ? battery - p owered equipment ? portable i nstruments ? digital c amera ? wlan communication ? hand - held instruments ordering information
e - c m o s c o r p . ( ww w . e c m o s . c o m . t w ) p a g e 2 o f 13 4 l03 n - rev. f001 EC8806 ultra - low noise ultra - fast 300ma ldo regulator marking information device marking information package type remarks EC8806vv b2 r 8806 vvyw sot23 - 5 1. vv output voltage(ex 15 1.5v;33 3.3v) 2. y year code(d=2013;e=2014;f=2015 ) 3. w week code(the big character of a~z is for the week of 1~26, and small a~z is for the week of 27~52.) EC8806vvc5 r 6 v vf sc70 - 5 1. vv output voltage(ex 15 1.5v;33 3.3v) 2. starting with underlined first - v , a bar is for production year 2012. the next bar is mark on top of second - v is for year 2013. the next bar is mark on bottom of second - v is for year 2014.the next bar is mark on top of f is year for 2015. the naming pattern continues with consecutive characters for later years. 3. f is the week of production. the big character of a~z is for the week of 1~26, and small a~z is for the week of 27~52. typical application circuit figure 1. fi xed voltage bp version figure 2. adjustable voltage version v in c in = 1 f enable v in v out en bp v out c out = 1 f 10 nf ( optional ) 100 k v in c in = 1 f enable v in v out en adj v out c out = 1 f r 1 r 2 100 k volts r r 1 2 . 1 v 2 1 out ? ? ? ? ? ? ? ? ?
e - c m o s c o r p . ( ww w . e c m o s . c o m . t w ) p a g e 3 o f 13 4 l03 n - rev. f001 EC8806 ultra - low noise ultra - fast 300ma ldo regulator absolute maximum ratings (note1) recommended operating conditions supply voltage v in 7 v input vol tage v in 2.5v to 7 v power dissipation, p d @ t a =25 c en input voltage 0v to 6 v sc 70 - 5 300 mw junction temperature - 40 c to 125 c sot23 - 5 400mw ambient oper ating temperature - 40 c to 85 c thermal resistance, ? ja sc 70 - 5 333 c /w sot 23 - 5 250 c /w lead temperature 260 c storage temperature - 6 5 c to 150 c electrical characteristics (unless otherwi se specified v in =5 v , t a =25 c ) parameters symbol condition min typ max units operating voltage range (note 2) v in 7 v standby current i sby v en = gnd,shutdown 0.01 1 a supply current limit i limit r load = 1 360 4 5 0 ma dropout voltage (note 3) v dro p i out = 3 00ma v out = 1. 2 v 1300 2100 mv v out = 1.8 v 1100 1500 mv v out = 2.5 v 580 800 mv v out = 2.8 v 410 500 mv v out = 3.0 v 300 400 mv v out = 3.1 v 260 370 mv v out = 3.3 v 200 300 mv en input bias current i ibsd v en = gnd or v in 0 100 n a l ine regulation v line v in = (v out +1v) to 5.5v i out = 1ma 10 mv/v load regulation v load 1ma < i out < 300ma 15 25 mv output noise voltage eno 10hz to 100 k hz i out = 200ma c out = 1 f 100 v rms thermal shutdown temperature t sd 1 65 c thermal shutdown temperature hysteresis t sd 30 c output voltage accuracy v out i out =1ma - 2 +2 % en threshold logic - low v v il v in = 3v to 5.5v,shutdown 0.4 v logic - high v v ih v in = 3v to 5.5v,start - u p 1.2 v power supply rejection rate f = 100hz psrr c out = 1 f, i out = 10ma - 7 0 db f = 10khz - 65 note 1: stresses listed as the above "absolute maximum ratings" may cause permanent damage to the device. these are for stress ratings. functional operation of the device at these or any other condition s beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. note 2: v in (min) = v out +v dropout note 3 : the dropout voltage is defined as (v in - v out ) when v out is 100mv below the target value of v out .
e - c m o s c o r p . ( ww w . e c m o s . c o m . t w ) p a g e 4 o f 13 4 l03 n - rev. f001 EC8806 ultra - low noise ultra - fast 300ma ldo regulator pin configurations (top view) pin description pin name pin function en chip enable (active high). note that this pin i s high impedance. there should be a pull low 100k resistor connected to gnd when the control signal is floating. gnd ground vout output voltage vin input voltage bp bypass pin adj feedback input , this pin could not be floating.
e - c m o s c o r p . ( ww w . e c m o s . c o m . t w ) p a g e 5 o f 13 4 l03 n - rev. f001 EC8806 ultra - low noise ultra - fast 300ma ldo regulator function block diagram shutdown and logic control mos driver - + v ref current - limit and thermal protection error amplifier en bp vin vout gnd figure 3 . bp version shutdown and logic control mos driver - + v ref current - limit and thermal protection error amplifier en vin vout gnd figure 4 . adj version adj
e - c m o s c o r p . ( ww w . e c m o s . c o m . t w ) p a g e 6 o f 13 4 l03 n - rev. f001 EC8806 ultra - low noise ultra - fast 300ma ldo regulator typical operating characteristics quiescent current ( v out = 2.8v v in = en current limit (ma) v out = 2.8 v v out connect 1 to gnd input voltage (v) input voltage (v) quiescent current vs. input voltage current limit vs. input voltage load current (ma) dropout voltage (mv) v out = 2.8 v v out = 2.8 v en = 0 v input voltage (v) shutdown current ( dropout voltage vs. load current shutdown current vs. input voltage v in = 5v v in = 3.3v output voltage (v) load current (ma) v out = 2.8 v input voltage (v) output voltage (v) i load = 300 ma i load = 1ma v out = 2.8 v load regulation line regulation 75 80 85 90 95 3 3.5 4 4.5 5 5.5 6 400 500 600 700 800 3 3.5 4 4.5 5 5.5 6 0 50 100 150 200 250 300 50 100 150 200 250 300 0 0.01 0.02 0.03 0.04 0.05 0.06 3 3.5 4 4.5 5 5.5 6 2.775 2.785 2.795 2.805 2.815 2.825 0 50 100 150 200 250 300 2.75 2.77 2.79 2.81 2.83 2.85 3 3.5 4 4.5 5 5.5 6
e - c m o s c o r p . ( ww w . e c m o s . c o m . t w ) p a g e 7 o f 13 4 l03 n - rev. f001 EC8806 ultra - low noise ultra - fast 300ma ldo regulator psrr ( - db ) frequenc y ( hz ) 100 1k 10k 100k v in = v out + 1 v = en c in =c out =1 ? f c bp =10nf v out 2.8 v, i load =50 ma v out 2.8 v, i load = 10ma psrr time (20s/div) start - up from en v in = 3.8v v out = 2.8v i load = 0ma en - dc ( 1 v/div) v out - dc (2v/div) start - up from en en - dc (1v/div) v out - dc (1v/div) time (200s/div) v in = 3.8v v out = 2.8v i load = 300ma en - dc ( 1 v/div) time (100s/div) sh utdown from en v in = 3.8v v out = 2.8v i load = 0ma time (10s/div) shutdown from en en - dc (1v/div) v in = 3.8v v out = 2.8v i load = 300ma v out - dc (2v/div) v out - dc (2 /div) 40 50 60 70 80 100 1000 10000 100000
e - c m o s c o r p . ( ww w . e c m o s . c o m . t w ) p a g e 8 o f 13 4 l03 n - rev. f001 EC8806 ultra - low noise ultra - fast 300ma ldo regulator v in = en = 3.8v i load = 1ma to 150ma time (200s/div) v out - ac (20mv/div) i load - dc (100ma/div) load transient response 9mv v in = en = 3.8v i load = 1ma to 300ma time (200s/div) v out - ac (20mv/div) i load - dc (200ma/div) load transient response 12.2m v time (1m s/div) line transient response v in (1v/div) v out (20mv/div) 7.8 mv v in = 4.0v to 5.0v, i load = 1ma time (1m s/div) line transient response v in (1v/div) v out (20mv/div) v in = 4. 0 v to 5.0v, i load = 300ma 7.6 mv
e - c m o s c o r p . ( ww w . e c m o s . c o m . t w ) p a g e 9 o f 13 4 l03 n - rev. f001 EC8806 ultra - low noise ultra - fast 300ma ldo regulator application i nformation capacitor selection and regulator stability input capacitor an input capacitance of 1f is required between the device input pin and ground directly (the amount of the capacitance may be increased without limit). the input capacitor must be loca ted less than 1 cm from the device to assure input stability (see pcb layout section). a lower esr capacitor allows the use of less capacitance, while higher esr type (like aluminum electrolytic) requires more capacitance. capacitor types (aluminum, cerami c and tantalum) can be mixed in parallel, but the total equivalent input capacitance/esr must be defined as above for stable operation. there are no requirements for the esr on the input capacitor, but tolerance and temperature coefficient must be consider ed when selecting the capacitor to ensure the capacitance is 1 f over the entire operating range. output capacitor the EC8806 is designed specifically to work with very small ceramic output capacitors. the minimum capacitance recommended (temperature chara cter istics of x7r, x5r, z5u or y5v) is within the 1f to 10f range with 5m to 50m esr range ceramic capacitor between ldo output and gnd for transient stability, but it may be increased without limit. higher capacitance values help to improve transient response. the output capacitor's esr is critical because it forms a zero to provide phase lead which is required for loop stability. enable function the ec88 06 is shut down by pulling the en pin low, and turned on by driving the input high. if the shutdow n feature is not required, the en pin should be tied to vin to keep the regulator on at all times (the en pin must not be left floating). to assure proper operation, the signal source used to drive the en pin must be able to swing above and below the speci fied turn - on/off voltage thresholds listed in the electrical characteristics under v ih and v il . the on/off signal may come from either cmos output, or an open - collector output with pull - up resistor to the device input voltage or another logic supply. the high - level voltage may exceed the device input voltage, but must remain within the absolute maximum ratings for the en pin. adjustable operation the adjustable version of the ec88 06 has an output voltage ranging from 1. 2 v to 4.75 v. the output voltage of t he ec88 06 adjustable regulator is programmed using an external resistor divider as shown in figure 5 . the output voltage can be calculated using: fig. 5 ? ? ? ? ? ? ? ? 2 1 1 2 . 1 r r v out
e - c m o s c o r p . ( ww w . e c m o s . c o m . t w ) p a g e 10 o f 13 4 l03 n - rev. f001 EC8806 ultra - low noise ultra - fast 300ma ldo regulator where: v ref = 1.2v typ . (the internal reference voltage) to enable default output voltage (pre - set), conn ect adj pin to ground. there is no external component needed to decide voltage. operating region and power dissipation since the ec88 06 is a linear regulator, its power dissipation is always given by p = i out (v in C v out ). the maximum power dissipation is given by: p d(max) = (t j C t a ) / ja =( 125 c - 25c )/2 5 0c /w = 500 mw where (t j C t a ) is the temperature difference the ec88 06 die and the ambient air, ja is the thermal resistance of the chosen package to the ambient air. f or surface mount device, heat sinking is accomplished by using the heat spreading capabilities of the pc board and its copp er traces. in the case of a sot 23 - 5 package, the thermal resistance is typically 240c /watt. refer to figure 6 & 7 for the ec88 06 va lid operating region (safe operating area) and refer to figure 8 for maximum power dissipation information of sot 23 - 5. the die attachment area of the ec88 06 lead frame is connected to pin 2, which is the gnd pin. therefore, the gnd pin of ec88 06 can dissip ate the heat from the die very effectively. to improve the maximum power providing capability, connect the gnd pin to ground using a large ground plane near the gnd pin.
e - c m o s c o r p . ( ww w . e c m o s . c o m . t w ) p a g e 11 o f 13 4 l03 n - rev. f001 EC8806 ultra - low noise ultra - fast 300ma ldo regulator
e - c m o s c o r p . ( ww w . e c m o s . c o m . t w ) p a g e 12 o f 13 4 l03 n - rev. f001 EC8806 ultra - low noise ultra - fast 300ma ldo regulator outline drawing s c70 - 5
e - c m o s c o r p . ( ww w . e c m o s . c o m . t w ) p a g e 13 o f 13 4 l03 n - rev. f001 EC8806 ultra - low noise ultra - fast 300ma ldo regulator outline drawing sot23 - 5

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